Understanding Key Router Components ! 99
Chapter 12: Monitoring Key Router Components
Data Flow Through the M40e Router Packet Forwarding Engine
Data flows through the M40e router Packet Forwarding Engine in the sequence
shown Figure 18.
Figure 18: M40e Router Packet Forwarding Engine Components and Data Flow
1. Packets arrive at an incoming PIC interface.
2. The PIC passes the packets to the FPC, where the Packet Director ASIC directs
them to the active I/O Manager ASIC.
3. The I/O Manager ASIC processes the packet headers, divides the packets into
64-byte data cells, and passes the cells through the midplane to the SFM.
4. A Distributed Buffer Manager ASIC on the SFM distributes the data cells
throughout the memory buffers located on and shared by all the FPCs.
5. The Internet Processor II ASIC on the SFM performs a route lookup for each
packet and decides how to forward it.
6. The Internet Processor II ASIC notifies the second Distributed Buffer Manager
ASIC (on the SFM) of the forwarding decision, and the Distributed Buffer
Manager ASIC forwards the notification to the FPC that hosts the appropriate
outbound interface.
7. The I/O Manager ASIC on the FPC reassembles data cells stored in shared
memory into data packets as they are ready for transmission and passes them
through the Packet Director ASIC to the outbound PIC.
8. The outbound PIC transmits the data packets.
1921
= ASIC
SFM
Routing
Engine
Internet
Processor II
Packet
Director
FPC
I/O
Manager
Packet
in
Packet
out
PIC
Controller
Midplane
Distributed
Buffer
Manager
Packet
Director