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Rohde & Schwarz R&S FSL3 - Signal Processing of the IEEE 802.16-2004 OFDM Measurement Application

Rohde & Schwarz R&S FSL3
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R&S FSL WiMAX, WiBro Measurements (Options K92/K93)
1300.2519.12 2.145 E-11
Signal Processing of the IEEE 802.16–2004 OFDM
Measurement Application
Abbreviation Description
256=
FFT
N FFT length
kl
a
,
symbol from the alphabet at symbol–index l of sub carrier k
k
EVM error vector magnitude of sub carrier k
EVM error vector magnitude of current packet
g
signal gain
f frequency deviation between Tx and Rx
l symbol index
]_,1[ Symbolsnofl
=
symbolsnof _ number of symbols of payload
k
H channel transfer function of sub carrier k
k
channel index ]127,128[=k
mod
K modulation dependent normalization factor
relative clock error of reference oscillator
kl
r
,
received symbol at symbol–index l of sub carrier k
Pilots = {–88, –63, –38, –13, 13, 38, 63, 88}
This description gives a rough view of the IEEE 802.162004 OFDM measurement application signal
processing. Details are disregarded in order to get a concept overview.
A diagram of the interesting blocks is shown in Fig. 2-90. First the RF signal is downconverted to the
IF frequency
=
IF
f 20.4 MHz. The resulting IF signal )(tr
IF
is shown on the left–hand side of the figure.
After bandpass filtering, the signal is sampled by an Analog to Digital Converter (ADC) at a sampling
rate of
=
1s
f 81.6 MHz. This digital sequence is resampled to the new sampling frequency of
=
2s
f 80 MHz which is a multiple of the Nyquist rate (20 MHz). The subsequent digital downconverter
shifts the IF signal to the complex base band. In the next step the base band signal is filtered by a FIR
filter. To get an idea, the rough transfer function is plotted in the figure. This filter fulfils two tasks: first it
suppresses the IF image frequency, secondly it attenuates the aliasing frequency bands caused by the
subsequent downsampling. After filtering, the sequence is sampled down by the factor of 4. Thus the
sampling rate of the downsampled sequence
)(ir is the Nyquist rate of =
3s
f 20 MHz. Up to this point
the digital part is implemented in an ASIC.

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