EM500 Open-Loop Vector Control Inverter User Manual
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The data address received by slave (inverter) is not a
permitted address; especially, the combination of the start
address and transmission length of the register is invalid
(refer to 12.3.4 Allocation of Register Address).
As detected by slave (inverter), the inquiry data frame
length or CRC parity is incorrect
Unrecoverable mistake happened when slave (inverter)
tries to execute require operation. The cause may include
logic error or failure to write EEPROM.
Data received by slave (inverter) exceeds the scope of
corresponding register: minimum - maximum.
The present register is read only and can not be written
Parameter: not
modified during
running
Inverter is in running status. The present register can not
be written. If necessary, please stop inverter at first.
Parameter:
password
protection
The present register is password protected.
12.4 Protocol Description
12.4.1 Definitions of Time Interval of Interframe and Intraframe Time
A complete MODBUS message includes not only the required data unit, but also
start and end marks. Therefore, as indicated in Figure 12-1 and Figure 12-3, an idle level
with the transmission time equal to or greater than 3.5 characters is defined as the start
mark, and the transmission will be deemed as abnormal if there is an idle level with
transmission time greater than 1.5 characters during the message transmission.
Specific start-end and abnormal interval time have something to do with bit rate
(refer to Table 12-5). If the bit rate is 9,600 bps, with sampling period of 1ms, then the
start-end interval is an idle level greater than or equal to 4ms (3.5×10/9600=3.64≈4), the
interval of exceptional data is the idle level with interval time among bits of one data
frame greater than or equal to 2ms (1.5×10/9600
＝
1.56≈2) but smaller than 4ms (idle
level between normal data bits less than or equal to 1 ms)
Table 12-5 Checklist of Time Interval and Bit Rate (when t
modify
=1 ms)
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