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Altera Stratix
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Altera Corporation 6–19
July 2005 Stratix Device Handbook, Volume 2
DSP Blocks in Stratix & Stratix GX Devices
9- & 18-Bit Multipliers
You can configure each DSP block multiplier for 9 or 18 bits. A single DSP
block can support up to 8 individual 9-bit or smaller multipliers, or up to
4 individual multipliers with operand widths between 10- and 18-bits.
Figure 6–10 shows the simple multiplier mode.
Figure 6–10. Simple Multiplier Mode
The multiplier operands can accept signed integers, unsigned integers, or
a combination. The signa and signb signals are dynamic and can be
registered in the DSP block. Additionally, you can register the multiplier
inputs and results independently. Pipelining the result, using the
pipeline registers in the block, increases the performance of the DSP
block.
36-Bit Multiplier
The 36-bit multiplier is a subset of the simple multiplier mode. It uses the
entire DSP block to implement one 36 × 36-bit multiplier. The four 18-bit
multipliers are fed part of each input, as shown in Figure 6–11 on
page 6–21. The adder/output block adds the partial products using the
CLRN
D
Q
ENA
A
CLRN
D
Q
ENA
CLRN
D
Q
ENA
A
B
shiftoutb
shiftouta
signb
signa
Adder Output Block

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