Altera Stratix - Page 324

7–38 Altera Corporation
Stratix Device Handbook, Volume 2 September 2004
Infinite Impulse Response (IIR) Filters
The first DSP block in Figure 7–22 is configured in the two-multipliers
adder mode, and the second DSP block is in the four-multipliers adder
mode. For an 18-bit input to the IIR filter, each biquad requires five
multipliers and five adders (two DSP blocks). One of the adders is
implemented using logic elements. Cascading several biquads together
can implement more complex, higher order IIR filters. It is possible to
insert registers in between the biquad stages to improve the performance.
Figure 7–23 shows a 4
th
order IIR filter realized using two cascaded
biquads in three DSP blocks.
Figure 7–23. Two Cascaded Biquads
x[n]
First
biquad
Second
biquad
y[n]
Two-multipliers
adder mode
DSP
block 2
Four-multipliers
adder mode
DSP
block 3
Four-multipliers
adder mode
DSP
block 1
a
20
a
21
b
22
b
21
a
12
a
22
a
10
a
11
b
12
b
11