Altera Corporation 11–53
July 2005 Stratix Device Handbook, Volume 2
Configuring Stratix & Stratix GX Devices
nSTATUS
N/A All Bidirectional
open-drain
The device drives
nSTATUS low immediately
after power-up and releases it after the POR
time.
Status output. If an error occurs during
configuration,
nSTATUS is pulled low by the
target device. Status input. If an external
source drives the
nSTATUS pin low during
configuration or initialization, the target device
enters an error state.
Driving
nSTATUS low after configuration and
initialization does not affect the configured
device. If a configuration device is used, driving
nSTATUS low causes the configuration device
to attempt to configure the FPGA, but since the
FPGA ignores transitions on
nSTATUS in user-
mode, the FPGA does not reconfigure. To
initiate a reconfiguration,
nCONFIG must be
pulled low.
The enhanced configuration devices’ and
EPC2 devices’
OE and nCS pins have optional
internal programmable pull-up resistors. If
internal pull-up resistors on the enhanced
configuration device are used, external 10-kΩ
pull-up resistors should not be used on these
pins. When using EPC2 devices, only external
10-kΩ pull-up resistors should be used.
This pin uses Schmitt trigger input buffers.
Table 11–15. Dedicated Configuration Pins on the Stratix or Stratix GX Device (Part 3 of 8)
Pin Name User Mode
Configuration
Scheme
Pin Type Description
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