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Mitsubishi Electric Q12DCCPU-V - Page 391

Mitsubishi Electric Q12DCCPU-V
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12
CONCEPT OF MULTIPLE CPU SYSTEM
12.4 Access Ranges Between a CPU Module and Other Modules
12.4.2 Access to non-controlled modules
12 - 17
9
DEVICE DESCRIPTION
10
MULTIPLE CPU SYSTEM
OVERVIEW
11
MULTIPLE CPU SYSTEM
CONFIGURATION
12
CONCEPT OF MULTIPLE
CPU SYSTEM
13
COMMUNICATIONS
BETWEEN CPU
MODULES
14
PARAMETERS ADDED
FOR MULTIPLE CPU
SYSTEMS
15
STARTING A MULTIPLE
CPU SYSTEM
16
TROUBLESHOOTING
2) Output (Y) data are loaded from the modules indicated in Table 12.11, which
are mounted on a main base unit and extension base units.
3) Data assigned to empty slots and cyclic data controlled by other CPUs on the
following network cannot be read out directly from the refresh target devices.
To the following read cyclic data, assign the refresh target device to the auto
refresh area in the CPU shared memory.
CC-Link IE controller network
MELSECNET/H
CC-Link, etc.
(b) When "All CPUs can read all outputs" is deselected
On/off data cannot be loaded from output (Y) modules and intelligent function
modules controlled by other CPUs (they remain off).
Table 12.11 Modules from which outputs are loaded
Type setting in the
<<I/O assignment settings>> tab
of C Controller setting utility
Mounted module
None
Output module
I/O combined module
Intelligent function module
Output
I/O mix
Output module
I/O combined module
Intelli. Intelligent function module

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