UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 394 of 523
NXP Semiconductors
UM10462
Chapter 20: LPC11U3x/2x/1x Flash programming firmware
20.8.7 Interrupts during IAP
The on-chip flash memory and EEPROM are not accessible during erase/write
operations. When the user application code starts executing, the interrupt vectors from the
user flash area are active. Before making any IAP call, either disable the interrupts or
ensure that the user interrupt vectors are active in RAM and that the interrupt handlers
reside in RAM. The IAP code does not use or disable interrupts.
20.8.8 RAM used by ISP command handler
ISP commands use on-chip RAM from 0x1000 017C to 0x1000 025B. The user could use
this area, but the contents may be lost upon reset. Flash programming commands use the
top 32 bytes of on-chip local RAM. The stack is located at RAM top ï€ 32 bytes. The
maximum stack usage is 256 bytes and grows downwards.
20.8.9 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip local RAM. The maximum
stack usage in the user allocated stack space is 128 bytes and grows downwards.
20.9 USB communication protocol
Remark: See Section 20.1 for supported parts.
The LPC11U3x/2x/1x is enumerated as a Mass Storage Class (MSC) device to a PC or
another embedded system. In order to connect via the USB interface, the
LPC11U3x/2x/1x must use the external crystal at a frequency of 12 MHz. The MSC device
presents an easy integration with the PC’s operating system. The LPC11U3x/2x/1x flash
memory space is represented as a drive in the host file system. The entire available user
flash is mapped to a file of the size of the LPC11U3x/2x/1x flash in the host’s folder with
the default name ‘firmware.bin’. The ‘firmware.bin’ file can be deleted and a new file can
be copied into the directory, thereby updating the user code in flash. Note that the
filename of the new flash image file is not important. After a reset or a power cycle, the
new file is visible in the host’s file system under it’s default name ‘firmware.bin’.
The code read protection (CRP, see Table 359
) level determines how the flash is
reprogrammed:
If CRP1 or CRP2 is enabled, the user flash is erased when the file is deleted.
If CRP1 is enabled or no CRP is selected, the user flash is erased and reprogrammed
when the new file is copied. However, only the area occupied by the new file is erased
and reprogrammed.
Remark: The only commands supported for the LPC11U3x/2x/1x flash image folder are
copy and delete.
Three Code Read Protection (CRP) levels can be enabled for flash images updated
through USB (see Section 20.12
for details). The volume label on the MSCD indicates the
CRP status.
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