UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 89 of 523
NXP Semiconductors
UM10462
Chapter 7: LPC11U3x/2x/1x I/O configuration
7.4.1.5 PIO0_4 register
7.4.1.6 PIO0_5 register
5 HYS Hysteresis. 0
0 Disable.
1 Enable.
6 INV Invert input 0
0 Input not inverted (HIGH on pin reads as 1, LOW on pin reads
as 0).
1 Input inverted (HIGH on pin reads as 0, LOW on pin reads as
1).
9:7 - - Reserved. 001
10 OD Open-drain mode. 0
0 Disable.
1 Open-drain mode enabled.
Remark: This is not a true open-drain mode.
31:11 - - Reserved. 0
Table 79. PIO0_3 register (PIO0_3, address 0x4004 400C) bit description
…continued
Bit Symbol Value Description Reset
value
Table 80. PIO0_4 register (PIO0_4, address 0x4004 4010) bit description
Bit Symbol Value Description Reset
value
2:0 FUNC Selects pin function. Values 0x3 to 0x7 are reserved. 000
0x0 PIO0_4 (open-drain pin).
0x1 I2C SCL (open-drain pin).
0x2 IOH_2.
7:3 - - Reserved. 10000
9:8 I2CMODE Selects I2C mode (see Section 7.3.8
).
Select Standard mode (I2CMODE = 00, default) or
Standard I/O functionality (I2CMODE = 01) if the pin
function is GPIO (FUNC = 000).
00
0x0 Standard mode/ Fast-mode I2C.
0x1 Standard I/O functionality
0x2 Fast-mode Plus I2C
0x3 Reserved.
31:10 - - Reserved. -
Table 81. PIO0_5 register (PIO0_5, address 0x4004 4014) bit description
Bit Symbol Value Description Reset
value
2:0 FUNC Selects pin function. Values 0x3 to 0x7 are reserved. 000
0x0 PIO0_5 (open-drain pin).
0x1 I2C SDA (open-drain pin).
0x2 IOH_3.