UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 246 of 523
NXP Semiconductors
UM10462
Chapter 12: LPC11U3x/2x/1x USART
12.5.5 USART Interrupt Identification Register (Read Only)
IIR provides a status code that denotes the priority and source of a pending interrupt. The
interrupts are frozen during a IIR access. If an interrupt occurs during a IIR access, the
interrupt is recorded for the next IIR access.
7:4 - Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
NA
8 ABEOINTEN Enables the end of auto-baud interrupt. 0
0 Disable end of auto-baud Interrupt.
1 Enable end of auto-baud Interrupt.
9 ABTOINTEN Enables the auto-baud time-out interrupt. 0
0 Disable auto-baud time-out Interrupt.
1 Enable auto-baud time-out Interrupt.
31:10 - Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
NA
Table 234. USART Interrupt Enable Register when DLAB = 0 (IER - address 0x4000 8004) bit
description
…continued
Bit Symbol Value Description Reset
value
Table 235. USART Interrupt Identification Register Read only (IIR - address 0x4004 8008) bit
description
Bit Symbol Value Description Reset
value
0 INTSTATUS Interrupt status. Note that IIR[0] is active low. The pending
interrupt can be determined by evaluating IIR[3:1].
1
0 At least one interrupt is pending.
1 No interrupt is pending.
3:1 INTID Interrupt identification. IER[3:1] identifies an interrupt
corresponding to the USART Rx FIFO. All other values of
IER[3:1] not listed below are reserved.
0
0x3 1 - Receive Line Status (RLS).
0x2 2a - Receive Data Available (RDA).
0x6 2b - Character Time-out Indicator (CTI).
0x1 3 - THRE Interrupt.
0x0 4 - Modem status
5:4 - Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
NA
7:6 FIFOEN These bits are equivalent to FCR[0]. 0
8 ABEOINT End of auto-baud interrupt. True if auto-baud has finished
successfully and interrupt is enabled.
0
9 ABTOINT Auto-baud time-out interrupt. True if auto-baud has timed
out and interrupt is enabled.
0
31:10 - Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
NA