UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 165 of 523
NXP Semiconductors
UM10462
Chapter 9: LPC11U3x/2x/1x GPIO
9.5.3.5 GPIO port pin registers
Reading these registers returns the current state of the pins read, regardless of direction,
masking, or alternate functions, except that pins configured as analog I/O always read as
0s. Writing these registers loads the output bits of the pins written to, regardless of the
Mask register.
9.5.3.6 GPIO masked port pin registers
These registers are similar to the PORT registers, except that the value read is masked by
ANDing with the inverted contents of the corresponding MASK register, and writing to one
of these registers only affects output register bits that are enabled by zeros in the
corresponding MASK register
Table 163. GPIO mask port 1 register (MASK1, address 0x5000 2084) bit description
Bit Symbol Description Reset
value
Access
31:0 MASKP1 Controls which bits corresponding to P1_n are active in the
P1MPORT register (bit 0 = P1_0, bit 1 = P1_1, ..., bit 31 =
P1_31).
0 = Read MPORT: pin state; write MPORT: load output bit.
1 = Read MPORT: 0; write MPORT: output bit not affected.
0R/W
Table 164. GPIO port 0 pin register (PIN0, address 0x5000 2100) bit description
Bit Symbol Description Reset
value
Access
31:0 PORT0 Reads pin states or loads output bits (bit 0 = P0_0, bit 1 =
P0_1, ..., bit 31 = P0_31).
0 = Read: pin is low; write: clear output bit.
1 = Read: pin is high; write: set output bit.
ext R/W
Table 165. GPIO port 1 pin register (PIN1, address 0x5000 2104) bit description
Bit Symbol Description Reset
value
Access
31:0 PORT1 Reads pin states or loads output bits (bit 0 = P1_0, bit 1 =
P1_1, ..., bit 31 = P1_31).
0 = Read: pin is low; write: clear output bit.
1 = Read: pin is high; write: set output bit.
ext R/W
Table 166. GPIO masked port 0 pin register (MPIN0, address 0x5000 2180) bit description
Bit Symbol Description Reset
value
Access
31:0 MPORTP0 Masked port register (bit 0 = P0_0, bit 1 = P0_1, ..., bit 31
= P0_31).
0 = Read: pin is LOW and/or the corresponding bit in the
MASK register is 1; write: clear output bit if the
corresponding bit in the MASK register is 0.
1 = Read: pin is HIGH and the corresponding bit in the
MASK register is 0; write: set output bit if the
corresponding bit in the MASK register is 0.
ext R/W
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