UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 344 of 523
NXP Semiconductors
UM10462
Chapter 15: LPC11U3x/2x/1x 16-bit counter/timers CT16B0/1
15.7.11 Count Control Register
The Count Control Register (CTCR) is used to select between Timer and Counter mode,
and in Counter mode to select the pin and edges for counting.
When Counter Mode is chosen as a mode of operation, the CAP input (selected by the
CTCR bits 3:2) is sampled on every rising edge of the PCLK clock. After comparing two
consecutive samples of this CAP input, one of the following four events is recognized:
rising edge, falling edge, either of edges or no changes in the level of the selected CAP
input. Only if the identified event occurs, and the event corresponds to the one selected by
bits 1:0 in the CTCR register, will the Timer Counter register be incremented.
7:6 EMC1 External Match Control 1. Determines the functionality of External Match 1. 00
0x0 Do Nothing.
0x1 Clear the corresponding External Match bit/output to 0 (CT16Bn_MAT1 pin is LOW if
pinned out).
0x2 Set the corresponding External Match bit/output to 1 (CT16Bn_MAT1 pin is HIGH if
pinned out).
0x3 Toggle the corresponding External Match bit/output.
9:8 EMC2 External Match Control 2. Determines the functionality of External Match 2. 00
0x0 Do Nothing.
0x1 Clear the corresponding External Match bit/output to 0 (CT16Bn_MAT2 pin is LOW if
pinned out).
0x2 Set the corresponding External Match bit/output to 1 (CT16Bn_MAT2 pin is HIGH if
pinned out).
0x3 Toggle the corresponding External Match bit/output.
11:
10
EMC3 External Match Control 3. Determines the functionality of External Match 3. 00
0x0 Do Nothing.
0x1 Clear the corresponding External Match bit/output to 0 (CT16Bn_MAT3 pin is LOW if
pinned out).
0x2 Set the corresponding External Match bit/output to 1 (CT16Bn_MAT3 pin is HIGH if
pinned out).
0x3 Toggle the corresponding External Match bit/output.
31:
12
- Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
-
Table 310. External Match Register (EMR, address 0x4000 C03C (CT16B0) and 0x4001 003C (CT16B1)) bit
description
Bit Symbol Value Description Reset
value
Table 311. External match control
EMR[11:10], EMR[9:8],
EMR[7:6], or EMR[5:4]
Function
00 Do Nothing.
01 Clear the corresponding External Match bit/output to 0 (CT16Bn_MATm pin is LOW if
pinned out).
10 Set the corresponding External Match bit/output to 1 (CT16Bn_MATm pin is HIGH if
pinned out).
11 Toggle the corresponding External Match bit/output.
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