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NXP Semiconductors LPC11U3x User Manual

NXP Semiconductors LPC11U3x
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UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 266 of 523
NXP Semiconductors
UM10462
Chapter 12: LPC11U3x/2x/1x USART
12.5.19 USART RS485 Control register
The RS485CTRL register controls the configuration of the USART in RS-485/EIA-485
mode.
Table 252. Smart Card Interface Control register (SCICTRL - address 0x4000 8048) bit
description
Bit Symbol Value Description Reset
value
0 SCIEN Smart Card Interface Enable. 0
0 Smart card interface disabled.
1 Asynchronous half duplex smart card interface is
enabled.
1 NACKDIS NACK response disable. Only applicable in T=0. 0
0 A NACK response is enabled.
1 A NACK response is inhibited.
2 PROTSEL Protocol selection as defined in the ISO7816-3 standard. 0
0T = 0
1T = 1
4:3 - - Reserved. -
7:5 TXRETRY - When the protocol selection T bit (above) is 0, the field
controls the maximum number of retransmissions that
the USART will attempt if the remote device signals
NACK. When NACK has occurred this number of times
plus one, the Tx Error bit in the LSR is set, an interrupt is
requested if enabled, and the USART is locked until the
FIFO is cleared.
-
15:8 XTRAGUARD - When the protocol selection T bit (above) is 0, this field
indicates the number of bit times (ETUs) by which the
guard time after a character transmitted by the USART
should exceed the nominal 2 bit times. 0xFF in this field
may indicate that there is just a single bit after a
character and 11 bit times/character
31:16 - - Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.
NA
Table 253. USART RS485 Control register (RS485CTRL - address 0x4000 804C) bit
description
Bit Symbol Value Description Reset
value
0 NMMEN NMM enable. 0
0 RS-485/EIA-485 Normal Multidrop Mode (NMM)
is disabled.
1 RS-485/EIA-485 Normal Multidrop Mode (NMM)
is enabled. In this mode, an address is detected
when a received byte causes the USART to set
the parity error and generate an interrupt.

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NXP Semiconductors LPC11U3x Specifications

General IconGeneral
BrandNXP Semiconductors
ModelLPC11U3x
CategoryMicrocontrollers
LanguageEnglish

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