UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 229 of 523
NXP Semiconductors
UM10462
Chapter 11: LPC11U3x/2x/1x USB2.0 device controller
11.6.4 USB Data buffer start address (DATABUFSTART)
This register indicates the page of the AHB address where the endpoint data can be
located.
11.6.5 USB Link Power Management register (LPM)
Table 216. USB EP Command/Status List start address (EPLISTSTART, address 0x4008
0008) bit description
Bit Symbol Description Reset
value
Access
7:0 - Reserved 0 RO
31:8 EP_LIST Start address of the USB EP Command/Status List. 0 R/W
Table 217. USB Data buffer start address (DATABUFSTART, address 0x4008 000C) bit
description
Bit Symbol Description Reset
value
Access
21:0 - Reserved 0 R
31:22 DA_BUF Start address of the buffer pointer page where all
endpoint data buffers are located.
0R/W
Table 218. Link Power Management register (LPM, address 0x4008 0010) bit description
Bit Symbol Description Reset
value
Access
3:0 HIRD_HW Host Initiated Resume Duration - HW. This is
the HIRD value from the last received LPM
token
0RO
7:4 HIRD_SW Host Initiated Resume Duration - SW. This is
the time duration required by the USB device
system to come out of LPM initiated suspend
after receiving the host initiated LPM resume.
0R/W
8 DATA_PENDING As long as this bit is set to one and LPM
supported bit is set to one, HW will return a
NYET handshake on every LPM token it
receives.
If LPM supported bit is set to one and this bit is
zero, HW will return an ACK handshake on
every LPM token it receives.
If SW has still data pending and LPM is
supported, it must set this bit to 1.
0R/W
31:9 RESERVED Reserved 0 RO
To Next Page
Loading...
Need help?
General
