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NXP Semiconductors LPC11U3x

NXP Semiconductors LPC11U3x
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UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 333 of 523
15.1 How to read this chapter
CT16B0/1 are available on all LPC11U3x/2x/1x parts. The number of capture inputs
depends on package size. See Chapter 8
.
15.2 Basic configuration
The CT16B0/1 counter/timers are configured through the following registers:
Pins: The CT16B0/1 pins must be configured in the IOCON register block.
Power: In the SYSAHBCLKCTRL register, set bit 7 and 8 in Table 24.
The peripheral clock is determined by the system clock (see Table 23).
Remark: The register offsets and bit offsets for capture channel 1 are different on timers
CT16B0 and CT16B1. The affected registers are:
Section 15.7.1 “Interrupt Register
Section 15.7.8 “Capture Control Register
Section 15.7.9 “Capture Registers
Section 15.7.11Count Control Register
15.3 Features
Two 16-bit counter/timers with a programmable 16-bit prescaler.
Counter or timer operation
Two 16-bit capture channels that can take a snapshot of the timer value when an input
signal transitions. A capture event may also optionally generate an interrupt.
The timer and prescaler may be configured to be cleared on a designated capture
event. This feature permits easy pulse-width measurement by clearing the timer on
the leading edge of an input pulse and capturing the timer value on the trailing edge.
Four 16-bit match registers that allow:
Continuous operation with optional interrupt generation on match.
Stop timer on match with optional interrupt generation.
Reset timer on match with optional interrupt generation.
Two external outputs corresponding to match registers with the following capabilities:
Set LOW on match.
Set HIGH on match.
Toggle on match.
Do nothing on match.
For each timer, up to four match registers can be configured as PWM allowing to use
up to two match outputs as single edge controlled PWM outputs.
UM10462
Chapter 15: LPC11U3x/2x/1x 16-bit counter/timers CT16B0/1
Rev. 5.5 — 21 December 2016 User manual

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