NXP Semiconductors LPC11U3x User Manual

UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 113 of 523
NXP Semiconductors
UM10462
Chapter 7: LPC11U3x/2x/1x I/O configuration
7.4.1.36 PIO1_11 register
6 INV Invert input 0
0 Input not inverted (HIGH on pin reads as 1, LOW on pin
reads as 0).
1 Input inverted (HIGH on pin reads as 0, LOW on pin reads as
1).
9:7 RESERVED Reserved. 001
10 OD Open-drain mode. 0
0 Disable.
1 Open-drain mode enabled. This is not a true open-drain
mode. Input cannot be pulled up above VDD.
31:11 RESERVED Reserved. 0
Table 110. PIO1_10 register (PIO1_10, address 0x4004 4088) bit description
…continued
Bit Symbol Value Description Reset
value
Table 111. PIO1_11 register (PIO1_11, address 0x4004 408C) bit description
Bit Symbol Value Description Reset
value
2:0 FUNC Selects pin function. Values 0x1 to 0x7 are reserved. 000
0x0 PIO1_11.
4:3 MODE Selects function mode (on-chip pull-up/pull-down resistor
control).
0x2
0x0 Inactive (no pull-down/pull-up resistor enabled).
0x1 Pull-down resistor enabled.
0x2 Pull-up resistor enabled.
0x3 Repeater mode.
5 HYS Hysteresis. 0
0 Disable.
1 Enable.
6 INV Invert input 0
0 Input not inverted (HIGH on pin reads as 1, LOW on pin
reads as 0).
1 Input inverted (HIGH on pin reads as 0, LOW on pin reads as
1).
9:7 RESERVED Reserved. 001
10 OD Open-drain mode. 0
0 Disable.
1 Open-drain mode enabled. This is not a true open-drain
mode. Input cannot be pulled up above VDD.
31:11 RESERVED Reserved. 0

NXP Semiconductors LPC11U3x Specifications

General

Brand	NXP Semiconductors
Model	LPC11U3x
Category	Microcontrollers
Language	English