NXP Semiconductors LPC11U3x User Manual

UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 34 of 523
NXP Semiconductors
UM10462
Chapter 3: LPC11U3x/2x/1x System control block
3.5.21 SSP1 clock divider register
This register configures the SSP1 peripheral clock SSP1_PCLK. The SSP1_PCLK can be
shut down by setting the DIV bits to 0x0.
3.5.22 USB clock source select register
This register selects the clock source for the USB usb_clk. The clock source can be either
the USB PLL output or the main clock, and the clock can be further divided by the
USBCLKDIV register (see Table 30
) to obtain a 48 MHz clock.
The USBCLKUEN register (see Section 3.5.23
) must be toggled from LOW to HIGH for
the update to take effect.
Remark: When switching clock sources, both clocks must be running before the clock
source is updated. The default clock source for the USB controller is the USB PLL output.
For switching the clock source to the main clock, ensure that the system PLL and the USB
PLL are running to make both clock sources available for switching. The main clock must
be set to 48 MHz and configured with the main PLL and the system oscillator. After the
switch, the USB PLL can be turned off.
3.5.23 USB clock source update enable register
This register updates the clock source of the USB with the new input clock after the
USBCLKSEL register has been written to. In order for the update to take effect, first write
a zero to the USBCLKUEN register and then write a one to USBCLKUEN.
Remark: When switching clock sources, both clocks must be running before the clock
source is updated.
Table 27. SPI1 clock divider register (SSP1CLKDIV, address 0x4004 809C) bit description
Bit Symbol Description Reset
value
7:0 DIV SSP1_PCLK clock divider values
0: Disable SSP1_PCLK.
1: Divide by 1.
to
255: Divide by 255.
0x00
31:8 - Reserved 0x00
Table 28. USB clock source select register (USBCLKSEL, address 0x4004 80C0) bit
description
Bit Symbol Value Description Reset
value
1:0 SEL USB clock source. Values 0x2 and 0x3 are reserved. 0x00
0x0 USB PLL out
0x1 Main clock
31:2 - - Reserved 0x00

NXP Semiconductors LPC11U3x Specifications

General

Brand	NXP Semiconductors
Model	LPC11U3x
Category	Microcontrollers
Language	English