UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 80 of 523
7.1 How to read this chapter
The IOCON register map depends on the package type (see Table 74). Registers for pins
which are not pinned out are reserved.
Pin functions IOH_n are available only on part LPC11U37H for use with the I/O Handler.
7.2 Introduction
The I/O configuration registers control the electrical characteristics of the pads. The
following features are programmable:
• Pin function
• Internal pull-up/pull-down resistor or bus keeper function (repeater mode)
• Open-drain mode for standard I/O pins
• Hysteresis
• Input inverter
• Glitch filter on selected pins
• Analog input or digital mode for pads hosting the ADC inputs
• I
2
C mode for pads hosting the I
2
C-bus function
7.3 General description
The IOCON registers control the function (GPIO or peripheral function) and the electrical
characteristics of the port pins (see Figure 13
).
UM10462
Chapter 7: LPC11U3x/2x/1x I/O configuration
Rev. 5.5 — 21 December 2016 User manual
Table 74. IOCON registers available
Package Port 0 Port 1
HVQFN33 PIO0_0 to PIO0_23 PIO1_15; PIO1_19
LQFP48 PIO0_0 to PIO0_23 PIO1_13 to PIO1_16; PIO1_19 to PIO1_29; PIO1_31
TFBGA48 PIO0_0 to PIO0_23 PIO1_5; PIO1_13 to PIO1_16; PIO1_19 to PIO1_29
LQFP64 PIO0_0 to PIO0_23 PIO1_0 to PIO1_29
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