UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 334 of 523
NXP Semiconductors
UM10462
Chapter 15: LPC11U3x/2x/1x 16-bit counter/timers CT16B0/1
15.4 Applications
• Interval timer for counting internal events
• Pulse Width Demodulator via capture input
• Free running timer
• Pulse Width Modulator via match outputs
15.5 General description
Each Counter/timer is designed to count cycles of the peripheral clock (PCLK) or an
externally supplied clock and can optionally generate interrupts or perform other actions at
specified timer values based on four match registers. Each counter/timer also includes
one capture input to trap the timer value when an input signal transitions, optionally
generating an interrupt.
In PWM mode, two match registers can be used to provide a single-edge controlled PWM
output on the match output pins. It is recommended to use the match registers that are not
pinned out to control the PWM cycle length.
15.6 Pin description
Table 294 gives a brief summary of each of the counter/timer related pins.
15.7 Register description
The 16-bit counter/timer0 contains the registers shown in Table 295 and the 16-bit
counter/timer1 contains the registers shown in Table 296
. More detailed descriptions
follow.
Table 294. Counter/timer pin description
Pin Type Description
CT16B0_CAP[1:0]
CT16B1_CAP[1:0]
Input Capture Signal:
A transition on a capture pin can be configured to load the
Capture Register with the value in the counter/timer and
optionally generate an interrupt.
The Counter/Timer block can select a capture signal as a clock
source instead of the PCLK derived clock. For more details see
Section 15.7.11
.
CT16B0_MAT[2:0]
CT16B1_MAT[1:0]
Output External Match Outputs of CT16B0/1:
When a match register of CT16B0/1 (MR1:0) equals the timer
counter (TC), this output can either toggle, go LOW, go HIGH, or
do nothing. The External Match Register (EMR) and the PWM
Control Register (PWMCON) control the functionality of this
output.