UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 430 of 523
23.1 How to read this chapter
The I/O Handler is only available on part LPC11U37HFBD64/401.
23.2 Features
• I/O Handler for hardware emulation of serial interfaces and DMA.
• Software library support and documentation for each library are available on
http://www.LPCware.com
.
• Software libraries for UART, I2C, I2S, DALI, DMA, and more.
23.3 Basic configuration
• I/O Handler library code must be executed from the memory area 0x2000 0000 to
0x2000 07FF. This memory is not available for other use.
• Enable the clock to the SRAM1 memory location in the SYSAHBCLKCTRL register.
See Table 24
.
• In the IOCON block, enable the IOH_n pin functions as needed by the software library
application. The documentation provided with each software library on
http://www.LPCware.com
lists the IOH_n pin functions (and other pin functions if
necessary) that must be selected in the IOCON block.
23.4 Description
The I/O Handler is a software-library supported hardware engine for emulating serial
interfaces and DMA functionality. The I/O Handler can emulate serial interfaces such as
UART, I2C, or I2S with no or very low additional CPU load and can off-load the CPU by
performing processing-intensive functions like DMA transfers in hardware. Software
libraries for multiple applications are available with supporting application notes from NXP.
(See http://www.LPCware.com
.)
23.5 Register description
The I/O Handler has no user-programmable register interface.
23.6 Examples
23.6.1 I/O Handler software library applications
The following sections provide application examples for the I/O Handler software library.
All library examples make use of the I/O Handler hardware to extend the functionality of
the part through software library calls.
UM10462
Chapter 23: LPC11U3x/2x/1x I/O Handler
Rev. 5.5 — 21 December 2016 User manual
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