R&S FSL Analog Demodulation (Option K7)
1300.2519.12 4.141 E-11
Circuit description – block diagrams
The software demodulator runs on the main processor of the analyzer. The demodulation process is
shown in Fig. 4-10: Block diagram of software demodulator. All calculations are performed
simultaneously with the same I/Q data set. Magnitude (= amplitude) and phase of the complex I/Q pairs
are determined. The frequency result is obtained from the differential phase.
For details on the analyzer signal processing refer to chapter "Remote Control – Commands", section
"TRACe:IQ Subsystem".
Fig. 4-10: Block diagram of software demodulator
The AM DC, FM DC and PM DC raw data of the demodulators is fed into the Trace Arithmetic block
that combines consecutive data sets. Possible trace modes are: Clear Write, Max Hold, Min Hold and
Average (for details refer to section "Trace mode overview" on page 4.40). The output data of the Trace
Arithmetic block can be read via remote control.
The collected measured values are evaluated by the selected detector (for details refer to chapter
"Instrument Functions", section "Detector overview". The result is displayed on the screen and can be
read out via remote control.
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