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Xilinx Virtex-6 FPGA User Manual

Xilinx Virtex-6 FPGA
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Virtex-6 FPGA GTX Transceivers User Guide www.xilinx.com 95
UG366 (v2.5) January 17, 2011
Implementation
X-Ref Target - Figure 1-58
Figure 1-58: Placement Diagram for the FF1924 Package (7 of 12)
QUAD_105
U38
U37
V44
V43
V40
V39
W42
W41
T35
T36
V35
V36
W38
W37
Y44
Y43
Y40
Y39
AA42
AA42
MGTTXP0_105
MGTTXN0_105
MGTRXP0_105
MGTRXN0_105
MGTTXP1_105
MGTTXN1_105
MGTRXP1_105
MGTRXN1_105
MGTREFCLK0P_105
MGTREFCLK0N_105
MGTREFCLK1P_105
MGTREFCLK1N_105
MGTTXP2_105
MGTTXN2_105
MGTRXP2_105
MGTRXN2_105
MGTTXP3_105
MGTTXN3_105
MGTRXP3_105
MGTRXN3_105
UG366_c1_58_111110
HX380T:GTXE1_X0Y23
HX565T:GTXE1_X0Y23
HX380T:GTXE1_X0Y22
HX565T:GTXE1_X0Y22
HX380T:GTXE1_X0Y21
HX565T:GTXE1_X0Y21
HX380T:GTXE1_X0Y20
HX565T:GTXE1_X0Y20
Left Edge of the Die
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Xilinx Virtex-6 FPGA Specifications

General IconGeneral
BrandXilinx
ModelVirtex-6 FPGA
CategoryTransceiver
LanguageEnglish

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