Xilinx Virtex-6 FPGA User Manual

36 www.xilinx.com Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
Chapter 1: Transceiver and Tool Overview
Virtex-6 FPGA GTX Transceiver Wizard
The Virtex-6 FPGA GTX Transceiver Wizard is the preferred tool to generate a wrapper to
instantiate a GTX transceiver primitive called GTXE1. The Wizard can be found in the
CORE Generator tool. Be sure to download the most up-to-date IP Update before using the
Wizard. Details on how to use this Wizard can be found in Virtex-6 FPGA GTX Transceiver
Getting Started Guide.
1. Start the CORE Generator tool.
2. Locate the GTX Transceiver Wizard in the taxonomy tree under:
Ports:
• GTXRXRESET
• PLLRXRESET
• PRBSCNTRESET
• RXBUFRESET
• RXCDRRESET
• RXDLYALIGNRESET
• RXRESET
• RXRESETDONE
• TSTIN[19:0]
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Attributes:
• CDR_PH_ADJ_TIME[4:0]
• RX_EN_IDLE_HOLD_CDR
• RX_EN_IDLE_HOLD_DFE
• RX_EN_IDLE_RESET_BUF
• RX_EN_IDLE_RESET_PH
• RX_EN_IDLE_RESET_FR
• RX_EN_MODE_RESET_BUF
• RX_EN_RATE_RESET_BUF
• RX_EN_REALIGN_RESET_BUF
• RX_IDLE_HI_CNT[3:0]
• RX_IDLE_LO_CNT[3:0]
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FPGA RX Interface
Ports:
• MGTREFCLKFAB[1:0]
• RXCHARISK[3:0]
• RXDATA[31:0]
• RXDISPERR[3:0]
• RXUSRCLK
• RXUSRCLK2
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Attributes:
• GEN_RXUSRCLK
• RX_DATA_WIDTH
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Table 1-1: Port and Attribute Summary (Cont’d)
Port/Attribute Section, Page
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Xilinx Virtex-6 FPGA Specifications

General

Brand	Xilinx
Model	Virtex-6 FPGA
Category	Transceiver
Language	English