Xilinx Virtex-6 FPGA User Manual

250 www.xilinx.com Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
Chapter 4: Receiver
Using RX Channel Bonding
The user must follow the steps described below in order to use the receiver channel
bonding.
Enabling Channel Bonding
Each GTX transceiver includes a circuit that performs channel bonding by controlling the
pointers of the RX elastic buffer. To use channel bonding, the RX_BUFFER_USE attribute
must be TRUE to turn on the elastic buffer.
Each GTX transceiver has a channel bonding circuit. Configuring a GTX transceiver for
channel bonding requires the following steps:
1. Set the channel bonding mode for each GTX transceiver.
2. Tie the RXCHBONDMASTER of the master transceiver High.
3. Tie the RXCHBONDSLAVE of the slave transceiver(s) High.
4. Connect the channel bonding port from the master to each slave, either directly or by
daisy chaining.
5. Set the channel bonding sequence and detection parameters.
Channel Bonding Mode
The channel bonding mode for each GTX transceiver determines whether channel bonding
is active and whether the GTX transceiver is the master or a slave. Each set of channel-
bonded GTX transceivers must have one master and can have any number of slaves. To
turn on channel bonding for a group of GTX transceivers, one transceiver is set to Master.
The remaining GTX transceivers in the group are set to Slaves.
CHAN_BOND_SEQ_LEN Integer Defines the length in bytes of the channel bonding sequence that the
transceiver matches to detect opportunities for channel bonding. Valid
lengths are 1, 2, and 4 bytes.
PCI_EXPRESS_MODE Boolean The default for this attribute is TRUE for PCI Express designs. For all
other protocols, the default setting is FALSE. Setting this attribute to
TRUE enables certain operations specific to PCI Express operation,
specifically, recognizing TXELECIDLE = 1, TXCHARDISPMODE = 1,
TXCHARDISPVAL = 0 as a request to power down the channel.
TXCHARDISPMODE = 1 and TXCHARDISPVAL = 0 encode the PIPE
interface signal TXCompliance = 1 of the PIPE specification.
The TXCHARDISPMODE and TXCHARDISPVAL settings encode for
PIPE and enable special support for FTS lane deskew.
For channel bonding, setting this attribute to TRUE allows channel
bonding on a shorter sequence with the reuse of prior channel bonding
information.
RX_DATA_WIDTH Integer Sets the receiver external data width:
8/10: 1-byte interface
16/20: 2-byte interface
32/40: 4-byte interface
If 8B10B is used, this attribute must be a multiple of 10.
Table 4-49: RX Channel Bonding Attributes (Cont’d)
Attribute Type Description
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Xilinx Virtex-6 FPGA Specifications

General

Brand	Xilinx
Model	Virtex-6 FPGA
Category	Transceiver
Language	English