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Xilinx Virtex-6 FPGA User Manual

Xilinx Virtex-6 FPGA
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212 www.xilinx.com Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
Chapter 4: Receiver
Eye Outline Scan Mode
This method provides diagnostic information related to the deterministic eye shape,
particularly the vertical eye opening. Setting RX_EYE_SCANMODE to 01 suspends the
DFE adaptation (if enabled). In this mode, DFEEYEDACMON provides a value between 0
and 31 that is proportional to the eye height at the phase offset determined by
RX_EYE_OFFSET.
This method measures the vertical opening corresponding to a high BER using the Scan
Sampler (see Figure 4-16) so that no additional eye closure due to random jitter or noise is
taken into account. However, this method does not corrupt received data that continues to
be detected using the data sampler. Eye outline scan mode can thus be employed while
data continues to be received without error.
Ports and Attributes
Table 4-26 defines the RX margin analysis ports.
X-Ref Target - Figure 4-18
Figure 4-18: Vertical Eye Height vs. RX_EYE_OFFSET
Internal Eye Opening
E
0
E
1
D
0
DFEEYEDACMON
RX_EYE_OFFSET
100 mV
–100 mV
0 mV
UG366_c4_50_120809
Table 4-26: RX Margin Analysis Ports
Port Dir Clock Domain Description
RXDATA[31:0] Out RXUSRCLK2 The user needs to detect data errors on RXDATA in order to monitor
the bit error rate of the link.
DFEEYEDACMON[4:0] Out RXUSRCLK2 Average vertical eye height (voltage domain) used by the DFE as an
optimization criterion.
11111: Indicates approximately 200 mV
PPD
of internal eye
opening.
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Xilinx Virtex-6 FPGA Specifications

General IconGeneral
BrandXilinx
ModelVirtex-6 FPGA
CategoryTransceiver
LanguageEnglish

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