11–60 Altera Corporation
Stratix Device Handbook, Volume 2 July 2005
Device Configuration Pins
Table 11–17 describes the dedicated JTAG pins. JTAG pins must be kept
stable before and during configuration to prevent accidental loading of
JTAG instructions. If you plan to use the SignalTap II Embedded Logic
Analyzer, you will need to connect the JTAG pins of your device to a
JTAG header on your board.
Table 11–17. Dedicated JTAG pins
Pin Name User Mode Pin Type Description
TDI
N/A Input Serial input pin for instructions as well as test and
programming data. Data is shifted in on the rising edge of
TCK. If the JTAG interface is not required on the board, the
JTAG circuitry can be disabled by connecting this pin to
V
CC
. This pin uses Schmitt trigger input buffers.
TDO
N/A Output Serial data output pin for instructions as well as test and
programming data. Data is shifted out on the falling edge
of
TCK. The pin is tri-stated if data is not being shifted out
of the device. If the JTAG interface is not required on the
board, the JTAG circuitry can be disabled by leaving this
pin unconnected.
TMS
N/A Input Input pin that provides the control signal to determine the
transitions of the TAP controller state machine. Transitions
within the state machine occur on the rising edge of
TCK.
Therefore,
TMS must be set up before the rising edge of
TCK. TMS is evaluated on the rising edge of TCK. If the
JTAG interface is not required on the board, the JTAG
circuitry can be disabled by connecting this pin to V
CC
.
This pin uses Schmitt trigger input buffers.
TCK
N/A Input The clock input to the BST circuitry. Some operations
occur at the rising edge, while others occur at the falling
edge. If the JTAG interface is not required on the board, the
JTAG circuitry can be disabled by connecting this pin to
GND. This pin uses Schmitt trigger input buffers.
TRST
N/A Input Active-low input to asynchronously reset the boundary-
scan circuit. The
TRST pin is optional according to IEEE
Std. 1149.1. If the JTAG interface is not required on the
board, the JTAG circuitry can be disabled by connecting
this pin to GND. This pin uses Schmitt trigger input buffers.
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