viii Altera Corporation
Contents Stratix Device Handbook, Volume 2
Multiplier Block ................................................................................................................................ 6–5
Adder/Output Block ....................................................................................................................... 6–9
Routing Structure & Control Signals ........................................................................................... 6–12
Operational Modes .............................................................................................................................. 6–18
Simple Multiplier Mode ................................................................................................................ 6–18
Multiply Accumulator Mode ........................................................................................................ 6–22
Two-Multiplier Adder Mode ........................................................................................................ 6–23
Four-Multiplier Adder Mode ....................................................................................................... 6–24
Software Support ................................................................................................................................. 6–28
Conclusion ............................................................................................................................................ 6–28
Chapter 7. Implementing High Performance DSP Functions
in Stratix & Stratix GX Devices
Introduction ............................................................................................................................................ 7–1
Stratix & Stratix GX DSP Block Overview ......................................................................................... 7–1
TriMatrix Memory Overview .............................................................................................................. 7–4
DSP Function Overview ....................................................................................................................... 7–5
Finite Impulse Response (FIR) Filters ................................................................................................. 7–5
FIR Filter Background ...................................................................................................................... 7–6
Basic FIR Filter .................................................................................................................................. 7–7
Time-Domain Multiplexed FIR Filters ........................................................................................ 7–13
Polyphase FIR Interpolation Filters .............................................................................................7–17
Polyphase FIR Decimation Filters ................................................................................................7–24
Complex FIR Filter ......................................................................................................................... 7–31
Infinite Impulse Response (IIR) Filters ............................................................................................. 7–34
IIR Filter Background .................................................................................................................... 7–34
Basic IIR Filters ............................................................................................................................... 7–36
Butterworth IIR Filters ................................................................................................................... 7–39
Matrix Manipulation ........................................................................................................................... 7–45
Background on Matrix Manipulation .......................................................................................... 7–45
Two-Dimensional Filtering & Video Imaging ........................................................................... 7–46
Discrete Cosine Transform (DCT) ..................................................................................................... 7–52
DCT Background ............................................................................................................................ 7–52
2-D DCT Algorithm ....................................................................................................................... 7–53
Arithmetic Functions ........................................................................................................................... 7–59
Background ..................................................................................................................................... 7–59
Arithmetic Function Implementation ......................................................................................... 7–60
Arithmetic Function Implementation Results ............................................................................ 7–62
Arithmetic Function Design Example ......................................................................................... 7–62
Conclusion ............................................................................................................................................ 7–62
References ............................................................................................................................................. 7–63
Section V. IP & Design Considerations
Revision History ..................................................................................................................... Section V–1