NXP Semiconductors LPC11U3x

UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 60 of 523
NXP Semiconductors
UM10462
Chapter 5: LPC11U3x/2x/1x Power profiles
Fig 10. Power profiles pointer structure
Ptr to ROM Driver table
Ptr to Device Table 2
Ptr to Device Table 1
Ptr to Device Table 0
…
Ptr to Device Table n
set_pll
set_power
Ptr to Function 2
Ptr to Function 0
Ptr to Function 1
…
Ptr to Function n
Power API function table
Device n
ROM Driver Table
0x1FFF 1FF8
+0x0
+0x04
+0x08
+0x0C
Ptr to PowerAPI Table
Fig 11. LPC11U3x/2x/1x clock configuration for power API use
SYS PLL
irc_osc_clk
sys_osc_clk
irc_osc_clk
wdt_osc_clk
MAINCLKSEL
SYSPLLCLKSEL
CLOCK
DIVIDER
SYSAHBCLKCTRL[1]
(ROM enable)
SYSAHBCLKCTRL[27]
(USBRAM enable)
CLOCK
DIVIDER
Peripherals
main clock system clock
sys_pllclkin
sys_pllclkout
7
ARM
CORTEX-M0
ROM
USB RAM
SYSAHBCLKDIV