Altera Stratix - Page 298

7–12 Altera Corporation
Stratix Device Handbook, Volume 2 September 2004
Finite Impulse Response (FIR) Filters
Figure 7–6. Parallel Loading 18-Bit 8-Tap FIR Filter Using Two DSP Blocks
Notes (1), (2)
Notes to Figure 7–6:
(1) The indexing x(n-1), ..., x(n-7) refers to the case of parallel loading.
(2) To increase the DSP block performance, include the input, pipeline, and output
registers. See Figure 7–3 on page 7–8 for the details.
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D Q
DSP block 1
Filter output
y(n)
h(0)
h(1)
h(2)
h(3)
x(n)
Filter coefficients
Data input
x(n-2)
x(n-3)
x(n-1)
h(4)
h(5)
h(6)
h(7)
x(n-4)
x(n-5)
x(n-6)
x(n-7)
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D Q
DSP block 2