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NXP Semiconductors LPC11U3x

NXP Semiconductors LPC11U3x
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UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 346 of 523
NXP Semiconductors
UM10462
Chapter 15: LPC11U3x/2x/1x 16-bit counter/timers CT16B0/1
7:5 SELCC Edge select. When bit 4 is 1, these bits select which capture
input edge will cause the timer and prescaler to be cleared.
These bits have no effect when bit 4 is low. Values 0x2 to
0x3 and 0x6 to 0x7 are reserved.
0
0x0 Rising Edge of CT16B0_CAP0 clears the timer (if bit 4 is
set).
0x1 Falling Edge of CT16B0_CCAP0 clears the timer (if bit 4 is
set).
0x2 Reserved.
0x3 Reserved.
0x4 Rising Edge of CT16B0_CAP1 clears the timer (if bit 4 is
set).
0x5 Falling Edge of CT16B0_CAP1 clears the timer (if bit 4 is
set).
31:8 - - Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
-
Table 313. Count Control Register (CTCR, address 0x4001 0070 (CT16B1)) bit description
Bit Symbol Value Description Reset
value
1:0 CTM Counter/Timer Mode. This field selects which rising PCLK
edges can increment Timer’s Prescale Counter (PC), or
clear PC and increment Timer Counter (TC).
Remark: If Counter mode is selected in the CTCR, bits 2:0 in
the Capture Control Register (CCR) must be programmed as
000.
0
0x0 Timer Mode: every rising PCLK edge
0x1 Counter Mode: TC is incremented on rising edges on the
CAP input selected by bits 3:2.
0x2 Counter Mode: TC is incremented on falling edges on the
CAP input selected by bits 3:2.
0x3 Counter Mode: TC is incremented on both edges on the CAP
input selected by bits 3:2.
3:2 CIS Count Input Select. In counter mode (when bits 1:0 in this
register are not 00), these bits select which CAP pin is
sampled for clocking. Values 0x2 to 0x3 are reserved.
0
0x0 CT16B1_CAP0.
0x1 CT16B1_CAP1.
4 ENCC Setting this bit to 1 enables clearing of the timer and the
prescaler when the capture-edge event specified in bits 7:5
occurs.
0
Table 312. Count Control Register (CTCR, address 0x4000 C070 (CT16B0)) bit description
Bit Symbol Value Description Reset
value

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