UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 411 of 523
NXP Semiconductors
UM10462
Chapter 20: LPC11U3x/2x/1x Flash programming firmware
Up to 4 parameters can be passed in the r0, r1, r2 and r3 registers respectively (see the
ARM Thumb Procedure Call Standard SWS ESPC 0002 A-05). Additional parameters are
passed on the stack. Up to 4 parameters can be returned in the r0, r1, r2 and r3 registers
respectively. Additional parameters are returned indirectly via memory. Some of the IAP
calls require more than 4 parameters. If the ARM suggested scheme is used for the
parameter passing/returning then it might create problems due to difference in the C
compiler implementation from different vendors. The suggested parameter passing
scheme reduces such risk.
The flash memory is not accessible during a write or erase operation. IAP commands,
which results in a flash write/erase operation, use 32 bytes of space in the top portion of
the on-chip local RAM for execution. The user program should not be using this space if
IAP flash programming is permitted in the application.
Table 382. IAP Command Summary
IAP Command Command code Reference
Prepare sector(s) for write operation 50 (decimal) Table 383
Copy RAM to flash 51 (decimal) Table 384
Erase sector(s) 52 (decimal) Table 385
Blank check sector(s) 53 (decimal) Table 386
Read Part ID 54 (decimal) Table 387
Read Boot code version 55 (decimal) Table 388
Compare 56 (decimal) Table 389
Reinvoke ISP 57 (decimal) Table 390
Read UID 58 (decimal) Table 391
Erase page 59 (decimal) Table 392
EEPROM Write 61(decimal) Table 393
EEPROM Read 62(decimal) Table 394
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