UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 507 of 523
NXP Semiconductors
UM10462
Chapter 25: Supplementary information
Table 160. GPIO direction port 0 register (DIR0, address
0x5000 2000) bit description . . . . . . . . . . . . .164
Table 161. GPIO direction port 1 register (DIR1, address
0x5000 2004) bit description . . . . . . . . . . . . .164
Table 162. GPIO mask port 0 register (MASK0, address
0x5000 2080) bit description . . . . . . . . . . . . .164
Table 163. GPIO mask port 1 register (MASK1, address
0x5000 2084) bit description . . . . . . . . . . . . .165
Table 164. GPIO port 0 pin register (PIN0, address 0x5000
2100) bit description . . . . . . . . . . . . . . . . . . . .165
Table 165. GPIO port 1 pin register (PIN1, address 0x5000
2104) bit description . . . . . . . . . . . . . . . . . . . .165
Table 166. GPIO masked port 0 pin register (MPIN0, address
0x5000 2180) bit description . . . . . . . . . . . . .165
Table 167. GPIO masked port 1 pin register (MPIN1, address
0x5000 2184) bit description . . . . . . . . . . . . .166
Table 168. GPIO set port 0 register (SET0, address 0x5000
2200) bit description . . . . . . . . . . . . . . . . . . . .166
Table 169. GPIO set port 1 register (SET1, address 0x5000
2204) bit description . . . . . . . . . . . . . . . . . . . .166
Table 170. GPIO clear port 0 register (CLR0, address
0x5000 2280) bit description . . . . . . . . . . . . .166
Table 171. GPIO clear port 1 register (CLR1, address
0x5000 2284) bit description . . . . . . . . . . . . .166
Table 172. GPIO toggle port 0 register (NOT0, address
0x5000 2300) bit description . . . . . . . . . . . . .167
Table 173. GPIO toggle port 1 register (NOT1, address
0x5000 2304) bit description . . . . . . . . . . . . .167
Table 174. Pin interrupt registers for edge- and
level-sensitive pins . . . . . . . . . . . . . . . . . . . .169
Table 175. __WORD_BYTE class structure . . . . . . . . . .172
Table 176. _BM_T class structure. . . . . . . . . . . . . . . . . .173
Table 177.
_CDC_ABSTRACT_CONTROL_MANAGEMENT
_DESCRIPTOR class structure . . . . . . . . . . .173
Table 178. _CDC_CALL_MANAGEMENT_DESCRIPTOR
class structure . . . . . . . . . . . . . . . . . . . . . . . .173
Table 179. _CDC_HEADER_DESCRIPTOR class structure
173
Table 180. _CDC_LINE_CODING class structure. . . . . .174
Table 181. _CDC_UNION_1SLAVE_DESCRIPTOR class
structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . .174
Table 182. _CDC_UNION_DESCRIPTOR class structure . .
174
Table 183. _DFU_STATUS class structure . . . . . . . . . . .174
Table 184. _HID_DESCRIPTOR class structure. . . . . . .175
Table 185.
_HID_DESCRIPTOR::_HID_DESCRIPTOR_LIS
T class structure . . . . . . . . . . . . . . . . . . . . . . .175
Table 186. _HID_REPORT_T class structure . . . . . . . . .175
Table 187. _MSC_CBW class structure . . . . . . . . . . . . .176
Table 188. _MSC_CSW class structure . . . . . . . . . . . . .176
Table 189. _REQUEST_TYPE class structure . . . . . . . .176
Table 190. _USB_COMMON_DESCRIPTOR class structure
176
Table 191. _USB_CORE_DESCS_T class structure . . .177
Table 192. _USB_DEVICE_QUALIFIER_DESCRIPTOR
class structure . . . . . . . . . . . . . . . . . . . . . . . .177
Table 193. _USB_DFU_FUNC_DESCRIPTOR class
structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178
Table 194. _USB_INTERFACE_DESCRIPTOR class
structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178
Table 195. _USB_OTHER_SPEED_CONFIGURATION
class structure . . . . . . . . . . . . . . . . . . . . . . . . 179
Table 196. _USB_SETUP_PACKET class structure. . . . 179
Table 197. _USB_STRING_DESCRIPTOR class structure .
180
Table 198. _WB_T class structure . . . . . . . . . . . . . . . . . 180
Table 199. USBD_API class structure . . . . . . . . . . . . . . 180
Table 200. USBD_API_INIT_PARAM class structure. . . 181
Table 201. USBD_CDC_API class structure . . . . . . . . . 184
Table 202. USBD_CDC_INIT_PARAM class structure. . 186
Table 203. USBD_CORE_API class structure . . . . . . . . 194
Table 204. USBD_DFU_API class structure. . . . . . . . . . 198
Table 205. USBD_DFU_INIT_PARAM class structure . . 198
Table 206. USBD_HID_API class structure . . . . . . . . . . 201
Table 207. USBD_HID_INIT_PARAM class structure. . . 202
Table 208. USBD_HW_API class structure . . . . . . . . . . 208
Table 209. USBD_MSC_API class structure . . . . . . . . . 216
Table 210. USBD_MSC_INIT_PARAM class structure. . 217
Table 211. Fixed endpoint configuration . . . . . . . . . . . . . 223
Table 212. USB device pin description . . . . . . . . . . . . . . 225
Table 213. Register overview: USB (base address: 0x4008
0000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
Table 214. USB Device Command/Status register
(DEVCMDSTAT, address 0x4008 0000) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 226
Table 215. USB Info register (INFO, address 0x4008 0004)
bit description. . . . . . . . . . . . . . . . . . . . . . . . . 228
Table 216. USB EP Command/Status List start address
(EPLISTSTART, address 0x4008 0008) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
Table 217. USB Data buffer start address (DATABUFSTART,
address 0x4008 000C) bit description . . . . . . 229
Table 218. Link Power Management register (LPM, address
0x4008 0010) bit description . . . . . . . . . . . . . 229
Table 219. USB Endpoint skip (EPSKIP, address 0x4008
0014) bit description. . . . . . . . . . . . . . . . . . . . 230
Table 220. USB Endpoint Buffer in use (EPINUSE, address
0x4008 0018) bit description . . . . . . . . . . . . . 230
Table 221. USB Endpoint Buffer Configuration (EPBUFCFG,
address 0x4008 001C) bit description . . . . . . 230
Table 222. USB interrupt status register (INTSTAT, address
0x4008 0020) bit description . . . . . . . . . . . . . 231
Table 223. USB interrupt enable register (INTEN, address
0x4008 0024) bit description . . . . . . . . . . . . . 232
Table 224. USB set interrupt status register (INTSETSTAT,
address 0x4008 0028) bit description . . . . . . 233
Table 225. USB interrupt routing register (INTROUTING,
a
ddress 0x40
08 002C) bit description . . . . . . 233
Table 226. USB Endpoint toggle (EPTOGGLE, address
0x4008 0034) bit description . . . . . . . . . . . . . 233
Table 227. Endpoint commands . . . . . . . . . . . . . . . . . . . 235
Table 228. USART pin description . . . . . . . . . . . . . . . . . 242
Table 229. Register overview: USART (base address:
0x4000 8000). . . . . . . . . . . . . . . . . . . . . . . . . 243
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