Xilinx Virtex-6 FPGA User Manual

Virtex-6 FPGA GTX Transceivers User Guide www.xilinx.com 163
UG366 (v2.5) January 17, 2011
TX Pattern Generator
X-Ref Target - Figure 3-25
Figure 3-25: TX Pattern Generator Block
UG366_c3_15_051110
T XDATA
Error
Insertions
Polarity
Inversion
PRBS-7
PRBS-15
PRBS-23
PRBS-31
PCI Express Compliance Pattern
Square Wave with 2 UI Period
Square Wave with 16 UI or 20 UI Period
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Xilinx Virtex-6 FPGA Specifications

General

Brand	Xilinx
Model	Virtex-6 FPGA
Category	Transceiver
Language	English