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Xilinx Virtex-6 FPGA User Manual

Xilinx Virtex-6 FPGA
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Virtex-6 FPGA GTX Transceivers User Guide www.xilinx.com 63
UG366 (v2.5) January 17, 2011
Implementation
X-Ref Target - Figure 1-26
Figure 1-26: Placement Diagram for the FF1154 Package (3 of 12)
HX250T:GTXE1_X1Y15
HX380T:GTXE1_X1Y15
HX250T:GTXE1_X1Y14
HX380T:GTXE1_X1Y14
HX250T:GTXE1_X1Y13
HX380T:GTXE1_X1Y13
HX250T:GTXE1_X1Y12
HX380T:GTXE1_X1Y12
QUAD_113
P5
P6
K1
K2
T5
T6
M1
M2
R8
R7
U8
U7
R3
R4
P1
P2
U3
U4
T1
T2
MGTTXP0_113
MGTTXN0_113
MGTRXP0_113
MGTRXN0_113
MGTTXP1_113
MGTTXN1_113
MGTRXP1_113
MGTRXN1_113
MGTREFCLK0P_113
MGTREFCLK0N_113
MGTREFCLK1P_113
MGTREFCLK1N_113
MGTTXP2_113
MGTTXN2_113
MGTRXP2_113
MGTRXN2_113
MGTTXP3_113
MGTTXN3_113
MGTRXP3_113
MGTRXN3_113
UG366_c1_26_111110
Right Edge of the Die
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Xilinx Virtex-6 FPGA Specifications

General IconGeneral
BrandXilinx
ModelVirtex-6 FPGA
CategoryTransceiver
LanguageEnglish

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