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Xilinx Virtex-6 FPGA User Manual

Xilinx Virtex-6 FPGA
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Virtex-6 FPGA GTX Transceivers User Guide www.xilinx.com 65
UG366 (v2.5) January 17, 2011
Implementation
X-Ref Target - Figure 1-28
Figure 1-28: Placement Diagram for the FF1154 Package (5 of 12)
HX250T:GTXE1_X1Y7
HX380T:GTXE1_X1Y7
HX250T:GTXE1_X1Y6
HX380T:GTXE1_X1Y6
HX250T:GTXE1_X1Y5
HX380T:GTXE1_X1Y5
HX250T:GTXE1_X1Y4
HX380T:GTXE1_X1Y4
QUAD_111
AB5
AB6
AF1
AF2
AC3
AC4
AH1
AH2
AC8
AC7
AE8
AE7
AD5
AD6
AJ3
AJ4
AE3
AE4
AK1
AK2
MGTTXP0_111
MGTTXN0_111
MGTRXP0_111
MGTRXN0_111
MGTTXP1_111
MGTTXN1_111
MGTRXP1_111
MGTRXN1_111
MGTREFCLK0P_111
MGTREFCLK0N_111
MGTREFCLK1P_111
MGTREFCLK1N_111
MGTTXP2_111
MGTTXN2_111
MGTRXP2_111
MGTRXN2_111
MGTTXP3_111
MGTTXN3_111
MGTRXP3_111
MGTRXN3_111
UG366_c1_28_111110
Right Edge of the Die
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Xilinx Virtex-6 FPGA Specifications

General IconGeneral
BrandXilinx
ModelVirtex-6 FPGA
CategoryTransceiver
LanguageEnglish

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