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Xilinx Virtex-6 FPGA User Manual

Xilinx Virtex-6 FPGA
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Virtex-6 FPGA GTX Transceivers User Guide www.xilinx.com 71
UG366 (v2.5) January 17, 2011
Implementation
X-Ref Target - Figure 1-34
Figure 1-34: Placement Diagram for the FF1154 Package (11 of 12)
HX250T:GTXE1_X0Y7
HX380T:GTXE1_X0Y7
HX250T:GTXE1_X0Y6
HX380T:GTXE1_X0Y6
HX250T:GTXE1_X0Y5
HX380T:GTXE1_X0Y5
HX250T:GTXE1_X0Y4
HX380T:GTXE1_X0Y4
QUAD_101
AB30
AB29
AF34
AF33
AC32
AC31
AH34
AH33
AC27
AC28
AE27
AE28
AD30
AD29
AJ32
AJ31
AE32
AE31
AK34
AK33
MGTTXP0_101
MGTTXN0_101
MGTRXP0_101
MGTRXN0_101
MGTTXP1_101
MGTTXN1_101
MGTRXP1_101
MGTRXN1_101
MGTREFCLK0P_101
MGTREFCLK0N_101
MGTREFCLK1P_101
MGTREFCLK1N_101
MGTTXP2_101
MGTTXN2_101
MGTRXP2_101
MGTRXN2_101
MGTTXP3_101
MGTTXN3_101
MGTRXP3_101
MGTRXN3_101
UG366_c1_34_111110
Left Edge of the Die
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Xilinx Virtex-6 FPGA Specifications

General IconGeneral
BrandXilinx
ModelVirtex-6 FPGA
CategoryTransceiver
LanguageEnglish

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