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Xilinx Virtex-6 FPGA User Manual

Xilinx Virtex-6 FPGA
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Virtex-6 FPGA GTX Transceivers User Guide www.xilinx.com 87
UG366 (v2.5) January 17, 2011
Implementation
X-Ref Target - Figure 1-50
Figure 1-50: Placement Diagram for the FF1923 Package (9 of 10)
AP40
AP39
AP44
AP43
AT 4 0
AT 3 9
AR42
AR41
AR37
AR38
AU37
AU38
AV40
AV39
AT 4 4
AT 4 3
AY40
AY39
AU42
AU41
UG366_c1_50_111110
HX255T:Not Available
HX380T:GTXE1_X0Y-1
HX565T:GTXE1_X0Y-1
HX255T:Not Available
HX380T:GTXE1_X0Y-2
HX565T:GTXE1_X0Y-2
HX255T:Not Available
HX380T:GTXE1_X0Y-3
HX565T:GTXE1_X0Y-3
HX255T:Not Available
HX380T:GTXE1_X0Y-4
HX565T:GTXE1_X0Y-4
QUAD_101
MGTTXP0_101
MGTTXN0_101
MGTRXP0_101
MGTRXN0_101
MGTTXP1_101
MGTTXN1_101
MGTRXP1_101
MGTRXN1_101
MGTREFCLK0P_101
MGTREFCLK0N_101
MGTREFCLK1P_101
MGTREFCLK1N_101
MGTTXP2_101
MGTTXN2_101
MGTRXP2_101
MGTRXN2_101
MGTTXP3_101
MGTTXN3_101
MGTRXP3_101
MGTRXN3_101
Left Edge of the Die
www.BDTIC.com/XILINX

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Xilinx Virtex-6 FPGA Specifications

General IconGeneral
BrandXilinx
ModelVirtex-6 FPGA
CategoryTransceiver
LanguageEnglish

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