UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 457 of 523
NXP Semiconductors
UM10462
Chapter 24: LPC11U3x/2x/1x Appendix ARM Cortex-M0
24.4.3.3 Shift Operations
Register shift operations move the bits in a register left or right by a specified number of
bits, the shift length. Register shift can be performed directly by the instructions ASR,
LSR, LSL, and ROR and the result is written to a destination register.The permitted shift
lengths depend on the shift type and the instruction, see the individual instruction
description. If the shift length is 0, no shift occurs. Register shift operations update the
carry flag except when the specified shift length is 0. The following sub-sections describe
the various shift operations and how they affect the carry flag. In these descriptions, Rm is
the register containing the value to be shifted, and n is the shift length.
24.4.3.3.1 ASR
Arithmetic shift right by n bits moves the left-hand 32 -n bits of the register Rm, to the right
by n places, into the right-hand 32 -n bits of the result, and it copies the original bit[31] of
the register into the left-hand n bits of the result. See Figure 24–82
.
You can use the ASR operation to divide the signed value in the register Rm by 2
n
, with
the result being rounded towards negative-infinity.
When the instruction is ASRS the carry flag is updated to the last bit shifted out, bit[n-1], of
the register Rm.
Remark:
• If n is 32 or more, then all the bits in the result are set to the value of bit[31] of Rm.
• If n is 32 or more and the carry flag is updated, it is updated to the value of bit[31] of
Rm.
24.4.3.3.2 LSR
Logical shift right by n bits moves the left-hand 32-n bits of the register Rm, to the right by
n places, into the right-hand 32 -n bits of the result, and it sets the left-hand n bits of the
result to 0. See Figure 83
.
You can use the LSR operation to divide the value in the register Rm by 2
n
, if the value is
regarded as an unsigned integer.
When the instruction is LSRS, the carry flag is updated to the last bit shifted out, bit[n-1],
of the register Rm.
Remark:
Fig 82. ASR #3
   

&DUU\
)ODJ
To Next Page
Loading...
Need help?
General
