Xilinx Virtex-6 FPGA User Manual

Virtex-6 FPGA GTX Transceivers User Guide www.xilinx.com 223
UG366 (v2.5) January 17, 2011
RX Byte and Word Alignment
Table 4-35 defines the RX comma alignment attributes.
RXSLIDE In RXUSRCLK2 RXSLIDE implements a comma alignment bump control. When
RXSLIDE is asserted, the byte alignment is adjusted by one bit,
which permits determination and control of byte alignment by
the FPGA logic. Each assertion of RXSLIDE causes just one
adjustment.
RXSLIDE must be deasserted for more than 16 RXUSRCLK2
cycles before it can be reasserted to cause another adjustment.
When asserted, RXSLIDE takes precedence over normal comma
alignment. For proper operation, the following settings should
be made:
RXENPCOMMALIGN = 0
RXENMCOMMALIGN = 0
RXCOMMADETUSE = 1
Table 4-34: RX Comma Alignment and Detection Ports (Cont’d)
Port Dir Clock Domain Description
Table 4-35: RX Comma Alignment Attributes
Attribute Type Description
ALIGN_COMMA_WORD Integer This attribute controls the alignment of detected commas within a multi-
byte datapath.
1: Align comma to either byte within a two-byte or four-byte datapath.
The comma can be aligned to either the even byte [9:0] or the odd byte
[19:10] for a two-byte RX interface, or the even bytes [9:0]/[29:20] or
odd bytes [19:10]/[39:30] for a four-byte RX interface.
2: Align comma to the even bytes within the datapath. The aligned
comma is guaranteed to be aligned to byte RXDATA[9:0] in a two-byte
datapath, or bytes [9:0]/[29:20] in a four-byte datapath. For
ALIGN_COMMA_WORD = 2 to work properly in conjunction with
the RX elastic buffer, both CLK_COR_ADJ_LEN and
CLK_COR_MIN_LAT must be even.
Protocols that send commas in even and odd positions must set
ALIGN_COMMA_WORD to 1. If RX_DATA_WIDTH is set to 8 or 10,
ALIGN_COMMA_WORD must be set to 1.
COMMA_10B_ENABLE 10-bit
Binary
Sets which bits of MCOMMA/PCOMMA must be matched to incoming
data and which bits can be any value.
This attribute is a 10-bit mask with a default value of 1111111111. Any
bit in the mask that is reset to 0 effectively turns the corresponding bit in
MCOMMA or PCOMMA to a don't care bit.
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Xilinx Virtex-6 FPGA Specifications

General

Brand	Xilinx
Model	Virtex-6 FPGA
Category	Transceiver
Language	English