EasyManua.ls Logo

Xilinx Virtex-6 FPGA

Xilinx Virtex-6 FPGA
317 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
32 www.xilinx.com Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
Chapter 1: Transceiver and Tool Overview
RX Pattern Checker
Ports:
PRBSCNTRESET
RXENPRBSTST[2:0]
RXPRBSERR
page 216
page 216
page 216
Attributes:
RXPRBSERR_LOOPBACK
page 216
Status Registers (Read Only):
RX_PRBS_ERR_CNT
page 216
RX Byte and Word Alignment
Ports:
RXBYTEISALIGNED
RXBYTEREALIGN
RXCOMMADET
RXCOMMADETUSE
RXENMCOMMAALIGN
RXENPCOMMAALIGN
RXSLIDE
page 222
page 222
page 222
page 222
page 222
page 222
page 223
Attributes:
ALIGN_COMMA_WORD
COMMA_10B_ENABLE
COMMA_DOUBLE
MCOMMA_10B_VALUE
MCOMMA_DETECT
PCOMMA_10B_VALUE
PCOMMA_DETECT
SHOW_REALIGN_COMMA
RX_SLIDE_MODE
RX_SLIDE_AUTO_WAIT
page 223
page 223
page 224
page 224
page 224
page 224
page 224
page 224
page 225
page 225
RX Loss-of-Sync State Machine
Ports:
RXLOSSOFSYNC
page 227
Attributes:
RX_LOS_INVALID_INCR
RX_LOS_THRESHOLD
RX_LOSS_OF_SYNC_FSM
page 227
page 227
page 227
RX 8B/10B Decoder
Table 1-1: Port and Attribute Summary (Cont’d)
Port/Attribute Section, Page
www.BDTIC.com/XILINX

Table of Contents

Other manuals for Xilinx Virtex-6 FPGA

Related product manuals