AMD AMD5K86 - Page 101

AMD~
AMD5J!36 Processor Technical Reference Manual
18524B/O-Mar1996
4.2.2 Integer Instructions
Table 4-1 shows the execution-unit usage for each integer
instruction, along with relative cycle numbers for dispatch and
execution of the associated ROPs for the instruction.
TABLE 4-1. Integer Instructions
Instruction Mnemonic Opcode Format
ADD reg, reg
ADD reg, mem
ADD mem, reg
ADD ALiAXIEAX, imm
ADD reg, imm
ADDmem,imm
AND reg, reg
AND reg, mem
ANDmem, reg
AND ALiAXIEAX, imm
AND reg, imm
ANDmem,imm
BSF reg, reg
BSFreg, mem
BSR reg, reg
BSRreg, mem
BSWAPreg
BT reg, reg
4-8
Fastpath or
Microcode
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Execution
Unit Timing
alu 1/1
ld 111
alu 1/2
ld 111
alu 112
st 1/1/3
alu 111
alu 1/1
ld 111
alu 1/2
st 11113
alu 111
ld 111
alu 1/2
ld 111
alu 112
st 11113
alu 111
alu 1/1
ld 111
alu 1/2
st 11113
alul 111
ld 1/1
alul 112
alul 111
ld 1/1
alul 1/2
alul 111
alul 111
Performance