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AMD AMD5K86 - A.2 Bus Interface

AMD AMD5K86
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AMDl1
AMD5iJ6
Processor
Technical
Reference
Manual
18524B/O-Mar1996
TABLE
A-I.
AMD5
K
86
and
Pentium
Processor
Signal
Comparison
(continued)
Pentium
Signal (735\90,
AMD5
K
86
Function
815\100)
PBREQ
x
Private
Bus
Request
PCD x x
Page
Cache
Disable
PCHK
x x
Parity
Check
PEN
x
x
Parity
Enable
PHIT
x
Private
Hit
PHI'rM
x
Private
Hit
to
Modified
Line
PICCLK x PIC clock, 5 V-Tolerant
PRDY
x x
Probe
Ready
PWT
x x
Page
Write
through
RIS
x x
Run
or
Stop
RESET
x x
Reset
SCYC
x x
Misaligned
Transfer
SID
x x
System
Management
Interrupt
SMIACT x x
System
Management
Interrupt
Active
STPCLK x x
Stop
Clock
TCK
x x
Test
Access
Port
(TAP) Clock
TDI
x x
Test
Access
Port
(TAP)
Data
In
TDO
x x
Test
Access
Port
(TAP)
Data
Out
TMS
x x
Test
Access
Port
(TAP)
Test
Mode
Select
TRST
x x
Test
Access
Port
(TAP)
Reset
WIR
x x
Write
or
Read
Cycle
WBIWT
x x
Write
back
or
Writethrough
A-4

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