AMD AMD5K86 - Page 390

AMD~
185248/0-Mar1996
AMD5i1J6 Processor Technical Reference Manual
TABLE A-l. AMD5
K
86 and Pentium Processor Signal Comparison (continued)
Pentium
Signal (735\90,
AMD5
K
86
Function
815\100)
CLK x x System Clock (5 V-tolerant)
CPUTYP x Primary or Secondary Processor
DIC x x Data or Code Cycle
D63-DO x
x
Data Bus
DIP x
Dual or Primary Processor Cycle
DP7-DPO
x x
Data Parity
DPEN x Dual Processor Present (during RESET)
pcrno
x PIC Data 0
EA1JS x x External Address Strobe
EWBE
x x
External Write Buffer Empty
FERR x x Floating-Point Error
x x Float-Test Mode (during RESET)
FLUSH
x x Write back and Invalidate Caches
Functional Redundancy Checking Mas-
FRCMC x x
ter/Checker
IIIT x x
Inquire Hit
IIITIJ.[
x x
Inquire Hit to Modified Line
HLDA x x
Hold Acknowledge
HOLD x x Hold
!ERR
x x Internal Error
IGNNE x x Ignore Numeric Error
x x
Execute BIST (during RESET)
INIT
x x
Initialize (warm start)
INV x x Invalid or Shared After Inquire Cycle
KEN
x
x
Cache Enable
x
Local
Interrupt 0 (APIC enabled)
LINTOIINTR
Maskable Interrupt
x x
x
Local
Interrupt 1 (APIC enabled)
LINT1INMI
Non-Maskable Interrupt
x x
LUCK
x x
Locked Cycle
MIID x x
Memory or I/O Cycle
NA x x
Next (pipelined) Address
PBGNT
x Private Bus Grant
Bus Signals
A-3