AMD AMD5K86 - BOFF (Backoff)

AMD~
AMD5t!J6 Processor Technical Reference Manual
18524B/O-Mar1996
5.2.10
Summary
Sampled
Details
5-J8
BDFF (Backoff)
Input
When system logic asserts BUFF, the processor floats the bus
and continues to float it until BUFF is negated. If the processor
is driving a bus cycle when BUFF is asserted, the cycle is
aborted and restarted after BUFF is negated. The processor
does not acknowledge BUFF. While BUFF is asserted, another
bus master can drive cycles on the bus, including inquire
cycles to the processor.
The processor samples BUFF in every clock. When BUFF is
asserted, the processor floats the cycle-driving outputs on the
bus in the next clock and continues to float them until BUFF is
negated.
BUFF is sampled during memory cycles (including cache
writethroughs and writebacks), 110 cycles, inquire cycles,
locked cycles, special bus cycles, and interrupt acknowledge
operations in the normal operating modes (Real, Protected,
and Virtual-8086) and in SMM; in the Shutdown, Halt, or Stop
Grant states; or while AHOLD, RESET, INIT, or PRDY is
asserted. BUFF is sampled but not effective when HLDA is
asserted. BUFF is not sampled during the Stop Clock state.
The assertion of BUFF, like HOLD but unlike AHOLD, forces
the processor to relinquish the full address and data bus to
another bus master. The signal can be used for the following
purposes:
• Bus Turnaround-Another bus master can assert BUFF to
the processor to obtain control of the bus, allowing the
other bus master to drive any type of bus cycles.
• Inquire Cycles-In multi-master systems with shared mem-
ory,
another bus master typically drives an inquire cycle to
the processor or its L2 cache prior to driving a read or write
cycle to any memory locations shared by both masters. Such
inquire cycles can be driven while BUFF is asserted.
• Deadlock Resolution-When an inquire cycle by one master
hits a modified cache line in another processor, neither mas-
ter can proceed until the target of the inquire cycle gets the
bus. In such a case, system logic would back the inquiring
master off the bus by asserting BUFF to it, so that the mas-
ter with the modified line can write it back to memory.
Bus Interface