AMD AMD5K86 - NMI Recognition during SMM

AMDl1
18524B/O-Mar1996 AMD5,IJ6 Processor Technical Reference Manual
A.S.S NMI Recognition during SMM
Comment
Power Saving Features
When operating in SMM, an NMI request should not be recog-
nized unless an enabled INTR is encountered. Both the
AMDS
K
86 and Pentium processors do this correctly, but in
slightly different ways. The Pentium processor takes the NMI
request immediately after recognizing the INTR, but before
executing any instructions from the interrupt handler. The
AMDS
K
86 processor takes the NMI request upon encountering
the IRET in the interrupt handler. (In fact, the AMDS
K
86 pro-
cessor unmasks NMI when any IRET is encountered, not just
one associated with INTR.)
With both processors, the Intel recommendation of using a
fake INTR to unmask NMI while in SMM works correctly.
A-Il