AMD AMD5K86 - SMI (System Management Interrupt)

AMD~
AMD5~6 Processor Technical Reference Manual 18524BjO-Mar1996
5-116
If memory reads, memory writes, or I/O reads are misaligned,
the AMDS
K
86 processor runs the bus cycles in the opposite
order of the Pentium processor. The AMDS
K
86 processor trans-
fers the low-address portion followed by the high-address por-
tion instead of the high-address portion followed by the low-
address portion.
I/O writes, however, are performed in the same order on both
processors.
Bus Interface