AMD AMD5K86 - Fetch

185248/0-Mar1996
Fetch
a)
b)
Calculate Address
Fetch instruction
Predict branch
1 Decode
a)
b)
Merge into byte queue
Generate Raps
2 Decode
a)
b)
Merge register tags and immediates
Access registers or ROB
Execute
a) Dispatch Raps to execution units
Calculate operand linear address
1
b)
Execute
Arbitrate for result bus
Access operands in data cache'
Check protection and segment Iimit
1
rward to execution units
Result
Fo
Wr
Co
Dr
iteto ROB
rrect branch prediction
ive write cycle on bus
1
Retire
Write to real-state registers
Forward from ROB
Notes:
I. Load/stare instructions only
AMD~
AMD5J1J6 Processor Technical Reference Manual
I
Fetch
I Decode 1
I
Decode 2 I
Execute
I
Result
I
Retire
2
J
I
I
2. The Retire stage may occur one or more clocks after completion, but it does not affect throughput.
FIGURE 2-2. Pipeline Stage Functions
Execution Pipeline
2-5