AMD AMD5K86 - LOCK (Bus Lock)

1 8524B/O-Marl 996
Signal Descriptions
AMD~
AMD5116 Processor Technical Reference Manual
The processor's CACHE output can be used to initiate an
address lookup in the external cacheability registers, and the
result of the lookup can be used to drive KEN.
If the address of an access falls within a cache able range, KEN
must be asserted during the first BRDY or NA of the bus cycle,
whichever comes first. If KEN and CACHE are both asserted
during a memory read, the processor performs the read cycle
as a four-transfer burst that fills a cache line, and four BRDY s
must be returned with the data. If either KEN or cACHE is
negated during the first BRDY or NA of the cycle, the proces-
sor ends the cycle at that BRDY or NA, with only a single quad-
word transfer. The processor ignores KEN during writes or
while CACHE is negated. For details on data-cache MESI state
transitions during reads, see Table 5-9 on page 5-52.
If all of the cache ways in which a potential line fill can be
cached are already filled with valid entries, the processor
selects a line to replace during the line fill. In the data cache, if
the selected line is in the modified state, the processor writes
the modified line back to memory before filling the vacated
cache line with the new contents.
If BUFF is asserted after the first eight bytes, BRDY and KEN
of a cache-line fill are returned, the processor uses the first
eight bytes but it does not cache them, and the line fill is
aborted. When BUFF is negated, the entire bus cycle is
restarted from the beginning and the system must again drive
KEN in the same state that was sampled before the backoff.
Thus, system logic cannot use BUFF to change the state of KEN
and therefore the cacheability status of a line.
On the 486 processor, KEN is sampled twice (on the first and
last transfer of a burst) and must be asserted at both times for
a
burst read to be treated as a cache-line fill. On the AMD5
K
86
and Pentium processors, however, KEN is sampled only on the
first clock of a transfer, during BRDY or NA, whichever is first.
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