AMD AMD5K86 - FIGURE 5-18. Locked Operation with BOFF Intervention

AMD~
AMD5f1J6 Processor Technical Reference Manual 18524B/O-Mar1996
Locked Operation
with IRJFF
Intervention
5-174
Unlike AHOLD and HOLD, BUFF does not permit an in-
progress bus cycle to complete. It forces the processor off the
bus in the next clock, aborting any in-progress bus cycle that
the processor may have begun. If BUFF is asserted during a
locked operation, only the cycle(s) aborted before their last
BRDY and the cycles not yet run are restarted after BUFF is
negated. Thus, system logic must keep track of all cycles in the
locked operation that have completed before the assertion of
BUFF and must continue the locked operation immediately
after BUFF is negated, except that if a writeback is pending
when BUFF is negated, the write back takes precedence over
the restarting of the aborted cycles in the locked operation.
Figure 5-18 shows the effect of BUFF intervening in a locked
read-write pair of bus cycles. The example begins with the
read, while LUCK is asserted. System logic asserts BUFF while
the processor is asserting ADS for the write, causing the pro-
cessor to abort the write and float its bus in the next clock.
Another bus master must wait two clocks after the assertion of
BUFF before driving its first bus cycle, because the processor
does not float its outputs until one clock after the assertion of
BUFF.
When system logic relinquishes the bus by negating BUFF, the
processor almost immediately drives the bus again, with LUCK
asserted, and restarts the aborted write access by asserting
ADS as early as one clock after BUFF is negated (although this
example shows two clocks after).
System logic should ensure that the processor results for inter-
rupted and uninterrupted locked cycles are consistent. That is,
system logic must guarantee that the memory accessed by the
processor is not modified during the time another 'blJS master
controls the bus.
Bus Interface