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AMD AMD5K86 - TABLE 5-5. Relation of BE7-BE0 to Other Signals

AMD AMD5K86
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AMD~
AMD51J6
Processor
Technical
Reference
Manual
18524BjO-Mar1996
5.2.8
Summary
8E7-BEO
(Byte
Enables)
Output
The
eight
bits
of
BE7-BEU,
when
cleared
to
0,
validate
the
eight
bytes
driven
on
D63-DO.
In
this
way, BE7-BEU
expands
on
the
function
of
address
bits
A2-AO,
which
do
not
exist
on
the
A31-A3
address
bus.
BE7-BEU also
help
differentiate
the
special
bus
cycles.
Driven
and
Floated
The
processor
drives
BE7-BEU
from
the
clock
in
which
ADS
is
asserted
until
the
last
expected
BRDY
of
the
bus
cycle.
The
processor
floats
BE7-BEU
one
clock
after
system
logic
asserts
BUFF
and
in
the
same
clock
that
the
processor
asserts
HLDA.
Details
5-J4
BE7-BEU
is
driven
with
the
address
and
cycle
definition
out-
puts
(DiC, M/IO
and
WIR)
during
memory
cycles
(including
cache
writethroughs
and
writebacks),
I/O cycles,
locked
cycles,
special
bus
cycles,
and
interrupt
acknowledge
operations
in
the
normal
operating
modes
(Real,
Protected,
and
Virtual-
8086)
and
in
SMM,
or
while
PRDY
is
asserted.
While
AHOLD
is
asserted,
BE7-BEU
is
driven
only
to
complete
a
bus
cycle
that
had
been
initiated
before
AHOLD
was
asserted,
or
for
inquire
cycle
writebacks.
During
the
Shutdown,
Halt,
and
Stop
Grant
states,
BE7-BEU is
driven
only
for
inquire
cycle
writebacks.
BE7-BEU
is
not
driven
during
the
Stop
Clock
state,
or
while
BUFF, HLDA,
RESET,
or
INIT
is
asserted.
Table
5-5
shows
the
relationship
between
BE7-BEU, D63-DO,
DP7-DPO,
and
the
effective
relationship
with
A2-AO,
the
non-
existent
low
address
bits.
The
BE7-BEU
signals
expand
on
the
function
of
A2-AO; BE7-BEU
allow
the
processor
to
address
any
or
all
eight
bytes
indicated
by
A31-A3,
whereas
A2-AO,
if
they
existed,
would
only
address
one
of
eight
bytes.
During
single-transfer
memory
cycles
and
all
I/O cycles,
the
processor
drives
BE7-BEU
to
identify
all
of
the
bytes
desired
for
the
transfer.
System
logic
must
return
valid
data
in
those
byte
lanes
of
D63-DO.
During
burst
reads
(CACHE
and
KEN
both
asserted
with
the
first
BRDY
of
a
memory
read),
the
processor
drives
BE7-BEO
with
ADS
to
identify
the
bytes
of
the
desired
instruction
or
operand.
The
processor
drives
BE7-BEO
with
the
desired
bytes
at
that
time
because
it
does
not
yet
know
whether
the
read
will
be
a
single-transfer
or
a
burst-this
depends
on
how
system
Bus
Interface

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